Interconnect RTL Design Engineer

Responsibilities:

As an RTL Design Engineer, you would be responsible for one or more functional units of the Interconnect while working closely with performance modeling, validation, and implementation teams to meet all functional requirements and performance, power, area (PPA) goals. Typical accountabilities include:

• Understanding the high-level specification and requirements of functional units of Interconnect products.
• Define the micro-architecture and develop Verilog RTL logic design for the unit
• Own one or more design automation flows (e.g. lint, CDC checking, IPXACT). Identify and implement enhancements to flows in collaboration with the methodology group.
• Collaborate with verification team, performance team, and implementation team to achieve functional, performance and PPA targets.
• Drive the exploration, analyses, and implementation of functional safety features to ensure the resulting product will be fit for purpose to be used in safety-related applications.
• Perform safety analyses, requirements tracking and documentation, and safety reviews following the Arm functional safety process for automotive use cases.

Required Skills and Experience:

• Good understanding of all stages of the design cycle: initial concept, specification, implementation, verification, documentation and support
• Ability to understand/drive/challenge technical solutions.
• Experience in hardware development and RTL design. Competence in digital design/hardware description languages, such as or Verilog, SystemVerilog or VHDL. 
• Good interpersonal and teamwork skills.
• An ideal candidate will have between 6-10 years of work experience in microprocessor, SoC, memory controller and interconnect IP design.

Technical Attributes

• Experience with interconnect and bus architectures (with proficiency in IO acceleration, PCIe, system caching, QoS)
• Knowledge of cache coherence and bus protocols (e.g. AMBA5 ACELite, AXI, CHI, AHB, APB) is a plus.
• Experience with Verilog or System Verilog based RTL design, with a focus on specified frequency, power, and area targets
• Knowledge of scripting languages python, perl, formats (json, yaml)
• Processor system knowledge including basic understanding of SoC systems as well as operating system software

"Nice to Have":

• Experience of working in a functional safety related development project applying standards such as ISO 26262 and/or IEC 61508.
• Prior verification or CAD experience is a plus.

In Return:

Arm is a high trust, supportive and flexible working environment, with an organic culture of creativity, resourcefulness and fun.

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